1. Field of the Invention
The present invention relates to a redundancy control circuit and a semiconductor memory using the same.
2. Description of the Related Art
In a semiconductor memory having a conventional redundancy memory circuit, a setting of a defect address to substitute a redundancy memory cell for a defective primary cell is typically carried out by blowing a fuse, to program the redundancy memory cell to respond the address of the defective primary cell. In this case, the fuse is blown by executing a physical dielectric breakdown by means of an external laser, at a wafer step.
As mentioned above, a method which uses the laser and breaks down the fuse, must break down the fuse before sealing a memory chip into a package. For this reason, the defects induced after the memory chip is sealed into the package (assembled) can not be relieved. This results that the sufficient improvement of yield can not be attained.
A method is known that can relieve the defects after the assembling. The method uses a metal fuse, a poly-silicon fuse and an anti-fuse that can be programmed by applying a high voltage. As for the anti-fuse programming process, a high voltage is applied between an upper electrode and a lower electrode of the anti-fuse. Then, the insulating film between these electrodes is dielectrically broken down so that both of the electrodes are short-circuited (electrically conducted).
This relieving method enables the defect address to be written to the anti-fuse, even after the chip is sealed into the package. Thus, the defects induced after the chip is sealed into the package can be relieved, thereby improving the yield.
When the defect address is set, the high voltage applying for dielectrically breakdown to the anti-fuse may be supplied from outside the device. However, there is the limit that a terminal for supplying a high voltage must be mounted on the device and that the defects can not be relieved after a module is assembled.
Therefore, there is a method of using a high voltage generated by a high voltage generating circuit inside the device. However, since the high voltage generating circuit is installed inside the device, the configuration of a power source and a circuit is limited, and there is a limit on its supplying performance.
Conventionally, when a plurality of anti-fuses are dielectrically broken down correspondingly to the data of the defect address, the high voltage generated by that high voltage generating circuit is simultaneously applied to the plurality of anti-fuses. In this case, if one anti-fuse is dielectrically broken down early, that broken anti-fuse is in the electrically conductive state. This leads to drop the level of the voltage applied to other anti-fuses that are not still electrically broken down. Originally, because of the limit on the current supplying performance of the high voltage generating circuit, the much high voltage can not continue to be applied to the broken anti-fuse. Therefore, if the level of the voltage is made down by the fact that the one anti-fuse is dielectrically broken down early, the other anti-fuses may not be dielectrically broken down.
In conjunction with the above description, Japanese Laid Open Patent Application (JP-A 2000-511326A) discloses a method of programming an anti-fuse. The method of programming the anti-fuse includes: supplying a positive voltage to a first terminal of the anti-fuse and supplying a negative voltage to a second terminal, so that a voltage applied between the first terminal and the second terminal is larger than one of the positive voltage and the negative voltage. At least one of the positive voltage and the negative voltage may be generated by a method including: supplying a first voltage to a first late of a capacitor and a second voltage to a second plate of the capacitor, then changing the first voltage to a third voltage of the first plate of the capacitor and connecting the second plate of the capacitor to the anti-fuse.
Also, in conjunction with the above description, Japanese Laid Open Patent Application (JP-A 2000-90689A) discloses a programming circuit of an anti-fuse. The programming circuit is characterized by including: an actuation switch section which pre-charges with half supply voltage; an anti-fuse which is connected to the actuation switch and is dielectrically broken down when an overcurrent flows; a sense signal input section which receives a sensing signal for checking the condition that the anti-fuse is programmed; a breakdown-voltage supplying section which supplies a supply voltage for dielectric breakdown of the anti-fuse; an output section which outputs a programming condition of the anti-fuse in response to a signal of the sense signal input section; a current breaking section which are intermittent in a current pass through which a current is supplied to the anti-fuse from the breakdown-voltage supplying section in response to a control signal of the output section; and a latch section which supplies the stabilized half supply voltage to the anti-fuse terminal in response to a control signal of the output section.